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include/arch/x86_64/ioapic.h

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 1#ifndef FURIX_ARCH_X86_64_IOAPIC_H
 2#define FURIX_ARCH_X86_64_IOAPIC_H
 3
 4#include <types.h>
 5
 6/*
 7 * mask every interrupt input on every IO-APIC.
 8 *
 9 * firmware routes the 8259 PIC lines (including the PIT timer) through the
10 * IO-APIC, so masking only the 8259s is not enough: once we enable the LAPIC
11 * and execute STI, a leftover PIC line still arrives on whatever vector the
12 * firmware programmed it for.
13 */
14void ioapic_disarm(void);
15
16/* default IO-APIC base when firmware did not leave one mapped */
17#define IOAPIC_DEFAULT_BASE 0xFEC00000u
18
19#endif /* FURIX_ARCH_X86_64_IOAPIC_H */