#ifndef FURIX_ARCH_X86_64_IOAPIC_H #define FURIX_ARCH_X86_64_IOAPIC_H #include /* * mask every interrupt input on every IO-APIC. * * firmware routes the 8259 PIC lines (including the PIT timer) through the * IO-APIC, so masking only the 8259s is not enough: once we enable the LAPIC * and execute STI, a leftover PIC line still arrives on whatever vector the * firmware programmed it for. */ void ioapic_disarm(void); /* default IO-APIC base when firmware did not leave one mapped */ #define IOAPIC_DEFAULT_BASE 0xFEC00000u #endif /* FURIX_ARCH_X86_64_IOAPIC_H */