#ifndef FURIX_ARCH_X86_64_IDT_H
#define FURIX_ARCH_X86_64_IDT_H

#include <io.h>
#include <types.h>

/* install the kernel IDT, with IST stacks wired up */
void idt_init(void);

/*
 * the IDT the AP trampoline loads: same stubs, but no IST entries (an AP has
 * no TSS) and gates selecting the trampoline's 64-bit code segment. written
 * by idt_init(); nothing else should touch it.
 */
extern struct desc_ptr idt_ap_pointer;

/*
 * selector of the 64-bit code segment in the AP trampoline's flat GDT. must
 * match arch/x86_64/ap_boot.S: index 3, so 0x18. the BSP's IDT uses 0x08 from
 * the GDT in gdt.c, which is a 32-bit segment and so unusable from a long-mode
 * interrupt gate.
 */
#define AP_CODE_SELECTOR_64 0x18

/* register a C handler for one vector; NULL restores the halting default */
void idt_set_handler(uint8_t vector, void (*handler)(void));

/*
 * the interrupt frame built by the assembly entry path in isr.S. field order
 * and offsets must match the push sequence there; assert_layout() in idt.c
 * checks the ones the C code actually reads.
 */
struct interrupt_frame {
  /* pushed by isr_common, lowest address first */
  uint64_t rax;
  uint64_t rbx;
  uint64_t rcx;
  uint64_t rdx;
  uint64_t rbp;
  uint64_t rsi;
  uint64_t rdi;
  uint64_t r8;
  uint64_t r9;
  uint64_t r10;
  uint64_t r11;
  uint64_t r12;
  uint64_t r13;
  uint64_t r14;
  uint64_t r15;

  /* pushed by the stub, then by the CPU */
  uint64_t vector;
  uint64_t error_code;
  uint64_t rip;
  uint64_t cs;
  uint64_t rflags;
  uint64_t rsp;
  uint64_t ss;
};

/* called from the assembly stubs with a pointer to the frame above */
void interrupt_dispatch(const struct interrupt_frame *frame);

/* vectors used by the kernel itself */
#define VECTOR_NMI 2
#define VECTOR_DOUBLE_FAULT 8
#define VECTOR_GENERAL_PROTECTION 13
#define VECTOR_PAGE_FAULT 14
#define VECTOR_SPURIOUS 0xFF

/* free vector for IPIs and other kernel-generated interrupts */
#define VECTOR_IPI_BASE 0x30
#define VECTOR_IPI_TIMER 0x30

#endif /* FURIX_ARCH_X86_64_IDT_H */